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settle time造句

"settle time"是什么意思   

例句與造句

  1. Studies on settle time of materiel in the disc type continuous drier
    盤式連續(xù)干燥器中物料在干燥盤上停留時(shí)間的研究
  2. Turn - on settling time ? a change in voltage over a specified time interval after the power is applied
    基準(zhǔn)器件加電后,規(guī)定時(shí)間里輸出電壓的變化(變化幅度或變化率) 。
  3. Turn - on settling time is important for portable battery systems that conserve energy by powering the circuitry only for short periods of time
    通電上升時(shí)間對要求通電時(shí)間短以保存電能的便攜式系統(tǒng)尤為重要。
  4. Popped corns can be added to milk to increase the settling time in the stomach , which can improve the absorb rate of the nutrition
    膨脆谷物可添加在牛奶中食用,可增加牛奶在胃中的停留時(shí)間,顯著提高營養(yǎng)的吸收率。
  5. Factors that affect system speed include the triggering time of the hardware , the relay actuation and settling times , and software overhead
    影響系統(tǒng)速率的因素包括硬件的觸發(fā)時(shí)間、繼電器的動(dòng)作和穩(wěn)定時(shí)間,以及軟件開銷。
  6. It's difficult to find settle time in a sentence. 用settle time造句挺難的
  7. The first one is founded on traditional dual - slope conversion while considering the non - ideal effects such as settling time to extend the measurable range below 0 . 5ns
    第一種是根據(jù)傳統(tǒng)的雙斜率轉(zhuǎn)換并同時(shí)考量安定時(shí)間等非理想因素而將可測范圍向下延伸至0 . 5奈秒。
  8. Simulations results indicate that the optimized controller based on the evolutionary principle of gas outperforms the conventional one greatly in overshoot , settling time and mean square error
    仿真結(jié)果表明,采用經(jīng)過遺傳算法優(yōu)化的模糊控制器,所得控制系統(tǒng)的超調(diào)量、調(diào)整時(shí)間以及均方誤差這三個(gè)指標(biāo)都大大優(yōu)于常規(guī)模糊控制器的控制效果。
  9. Abstract : this paper developed time domain integral constraints on error response for siso feedback control systems caused by nominal plant ' s near cancellation of stable pole - zero near the j - axis . these integral constraints should be satisfied by any feedback control systems . these integral constraints give new insight into the inherent trade - offs . it will result in the settling time longer or the infinite norm of the error response larger when there are near cancellations of stable pole - zero near the j - axis . hence , when feedback control systems are designed , it is necessary to avoid the compensator ' s poles and zeros nearly cancelling the nominal ' s zeros and poles ( even if these poles and zeros are stable )
    文摘:導(dǎo)出了單輸入單輸出反饋控制系統(tǒng)誤差響應(yīng)基于名義系統(tǒng)穩(wěn)定的零、極點(diǎn)近似相消的時(shí)間域積分約束,此積分約束是任何反饋控制系統(tǒng)均應(yīng)滿足的.這一約束給出了單輸入單輸出反饋系統(tǒng)固有折中的新的觀點(diǎn).名義系統(tǒng)穩(wěn)定的零、極點(diǎn)近似相消的存在導(dǎo)致反饋控制系統(tǒng)的調(diào)節(jié)時(shí)間延長或者誤差響應(yīng)的無窮范數(shù)變大.因此,在反饋控制系統(tǒng)設(shè)計(jì)中,盡量避免補(bǔ)償器的零、極點(diǎn)與名義系統(tǒng)的極、零點(diǎn)近似相消(即使這些零、極點(diǎn)是穩(wěn)定的)
  10. Based on the study of r - 2r resistor network , a new precision resistor network is also presented . and the high - speed current switch , reference ampler , bias circuit are described in terms of their design principles and circuit structures . this architecture implements the 8bit d / a converter and the settle time achieves 110ns
    針對高速的要求,在研究r - 2r電阻網(wǎng)絡(luò)基礎(chǔ)上設(shè)計(jì)了一種新型精密電阻網(wǎng)絡(luò);同時(shí)著重闡述了包括八個(gè)匹配的共射極電位不變的電流開關(guān)、基準(zhǔn)放大器、偏置電路等在內(nèi)的基本單元電路的設(shè)計(jì)原理和結(jié)構(gòu)。
  11. A method of fuzzy optimization design based on genetic algorithm is presented as a new method of parameter optimization design for dc double closed loop speed adjusting system . the method covers three steps . firstly , speed overshoot rate and settling time are chosen as performance indice according to the demand of engineering . these indice are normalized by using fuzzy membership function and then weighted to form objective function of optimization model of the system . secondly , the dynamic response curve of the system with corresponding parameters and peoformance indice are obtained by computerized numerical calculation and simulation . finally , parameters of engineering design are expanded as searching space ; and parameters of speed regulator and current regulator are taken as genes in chromosome . these genes in searching space are optimized to get best solution by way of genetic algorithm . as shown by experimental results , the parameters designed by this method are capable of significantly improving performance indice of the system , which proves that it is a practical and effective method
    提出一種基于遺傳算法的直流雙閉環(huán)調(diào)速系統(tǒng)參數(shù)優(yōu)化設(shè)計(jì)方法.根據(jù)工程技術(shù)的要求,選用速度超調(diào)量和過渡時(shí)間作為參數(shù)優(yōu)化性能指標(biāo).將該指標(biāo)用模糊隸屬度函數(shù)歸一化,再加權(quán)平均形成系統(tǒng)優(yōu)化模型的目標(biāo)函數(shù).采用計(jì)算機(jī)數(shù)值計(jì)算方法,通過仿真獲得系統(tǒng)對應(yīng)參數(shù)的動(dòng)態(tài)響應(yīng)曲線及其性能指標(biāo).最后以工程設(shè)計(jì)的參數(shù)為搜索范圍,以速度調(diào)節(jié)器和電流調(diào)節(jié)器的參數(shù)為染色體中的基因,通過遺傳算法在搜索范圍中優(yōu)化這些基因,獲得優(yōu)化解.實(shí)驗(yàn)結(jié)果表明,所設(shè)計(jì)的參數(shù)能使系統(tǒng)性能指標(biāo)有顯著提高
  12. Through lots of simulation experiment , deeply discuss the structure of the cascade fuzzy control system and get the final project . the simulation experiments state that to import the fuzzy logic controller to the cascade control system can greatly improve the control quality of the cascade control , shorten the settling time and boost up the resistance to the inner loop disturbance
    由于模糊控制器本身存在著較大的靜態(tài)偏差,研究中提出了將普通的模糊控制器與積分控制器相結(jié)合,利用積分控制器來解決模糊控制器的靜態(tài)偏差大的弊病,可以實(shí)現(xiàn)良好的控制效果,在大量的仿真實(shí)驗(yàn)基礎(chǔ)上,總結(jié)出模糊控制器引入到串級控制系統(tǒng)中的最佳結(jié)合方案。
  13. Firstly , a two - stage structure for the ota is presented after comprehensive considerations on characteristics like open - loop gain , unity - gain bandwidth , phase margin and settling time . then the input and output topologies have been decided by comparing different structure available for this purpose
    首先,通過對ota開環(huán)增益、單位增益帶寬、相位裕度和建立時(shí)間等性能指標(biāo)的分析,并對比了幾種典型運(yùn)放結(jié)構(gòu),設(shè)計(jì)開發(fā)了一種cmos全差分共源共柵兩級運(yùn)算放大器框架。
  14. For the different stage resolution sub _ adc with the comparators , it is shown that all sub _ adc work right at clock frequency up to 100mhz with a total power dissipation of 5 . 57mw , while minimal resolution voltage is 10mv , settling time less than 1 . 2ns . when the optimum value of ladder resistance is 1k , the glitches introduced to input signal and the reference
    當(dāng)子adc和構(gòu)成adc的其他模塊進(jìn)行系統(tǒng)仿真,采樣頻率為100msps時(shí), adc系統(tǒng)獲得不超過1 / 2lsb的dnl ;當(dāng)正負(fù)輸入端分別輸入頻率40 . 902mhz ,相位相反的正弦信號時(shí), sfdr為75 . 4584db 。
  15. But often what is not obvious when reading a manufacturer ' s data sheet is how the initial accuracy of the device is affected by other key device parameters such as line regulation , load regulation , initial voltage error , output voltage temperature coefficient ( tc ) , output voltage noise , turn - on settling time , thermal hyste - resis , quiescent supply current , and long - term stability
    但,人們閱讀廠家的數(shù)據(jù)手冊時(shí),因受諸如(電源電壓)線性調(diào)整率、負(fù)載調(diào)整率、初始電壓誤差、輸出電壓溫度系數(shù)tc 、熱遲滯(系數(shù)) 、靜態(tài)電流和長期穩(wěn)定度等參數(shù)的影響而使初始精度往往不明顯。

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